A chip die photographed in infrared light

Roadmap

What's next, in the order we expect to build it.

Nothing on this page exists yet. It is the plan, and it will change as early users tell us what matters.

Solver robustness

Convergence and meshing

Fix the open convergence failure in the full NMOS sweep, and add mesh inspection and refinement.

Validation

Calibration to measured data

Fit model parameters to a lab's own I–V and C–V measurements, starting with HEMT self-heating and contact resistance.

Physics

Richer device models

Quantised 2DEG, self-heating, field plates, doping-dependent mobility and trap transients.

Workbench

Deeper analysis

Richer geometry, cutlines, field snapshots at each bias point, and circuit-level output targets.

Devices

More device types

PMOS, power MOSFETs, PN and Schottky diodes.

Assistant

Workspace-aware assistant

Give the assistant explicit context from the open project, deck and runs.

Scale

Faster exploration

Surrogate models trained on physics runs to screen designs quickly — with the physics kept as the source of truth.

Later

Beyond 2D

True 3D simulation.

Tell us what to build first.

Early users shape this list. If a missing capability blocks your work, we want to hear about it.